Dr. Shahab Ardalan

Assistant Professor

Electrical Engineering Department

San Jose State University

Teaching

EE-124: Electronic Circuit II

Course Note

Review: CMOS Amplifiers
Review: CMOS Amplifiers
Current Mirror and Cascode
Differential Amp
Frequency Response-Blank Lecture
Feedback Lecture
Sample Midterm Exam
Solution for Midterm Exam
Cadence Project

Extra

Green-Sheet

Bacon ipsum dolor sit amet landjaeger sausage brisket, jerky drumstick fatback boudin ball tip turducken. Pork belly meatball t-bone bresaola tail filet mignon kevin turkey ribeye shank flank doner cow kielbasa shankle. Pig swine chicken hamburger, tenderloin turkey rump ball tip sirloin frankfurter meatloaf boudin brisket ham hock. Hamburger venison brisket tri-tip andouille pork belly ball tip short ribs biltong meatball chuck. Pork chop ribeye tail short ribs, beef hamburger meatball kielbasa rump corned beef porchetta landjaeger flank. Doner rump frankfurter meatball meatloaf, cow kevin pork pork loin venison fatback spare ribs salami beef ribs.

2Jerky jowl pork chop tongue, kielbasa shank venison. Capicola shank pig ribeye leberkas filet mignon brisket beef kevin tenderloin porchetta. Capicola fatback venison shank kielbasa, drumstick ribeye landjaeger beef kevin tail meatball pastrami prosciutto pancetta. Tail kevin spare ribs ground round ham ham hock brisket shoulder. Corned beef tri-tip leberkas flank sausage ham hock filet mignon beef ribs pancetta turkey.

EE-224: CMOS Digital Integrated Circuit

Course Note

Notes

Assignment

Solution

Introduction
Diode 1 , 2 Solution
MOSFET 1 , 2 Solution
Inverter 1, 2 Solution 1
Buffer Assignment Solution
Comb. Logic: Static CMOS 1, 2 1, 2
Comb. Logic: PTL & Dynamic
Logical Effort Assignment Solution
Sequential Logic 1, 2 1, 2
Wire and Interconnect 1, 2 1, 2
Timing Issues Assignment Solution

Cadence Video Tutorial:

Cadence: Inverter Schematic & Symbol
Cadence: Layout with DRC and LVS
Cadence: PVT Variation
Cadence: ADE-XL
Cadence: Layout Extraction
Cadence: Post Layout Simulation

Extra

Green-Sheet

Project:

Montgomery Modular Mult.
SHA-256

EE-227: Signal Integrity for AMS ICs

Course Note

Signal Integrity Assignment Solution
PLL-Introduction Assignment Solution
PLL-Modeling Assignment Solution
Current Mode Logic Assignment Solution
CDR-Modeling Assignment Solution
Simulink Modeling Assignment Solution
Jitter in CDR Assignment Solution
Oscillator Assignment Solution
Digital PLL Assignment Solution
Advanced CDRs Assignment Solution

Lab:

Lab1: Channel
Lab2: DFE

Simulink Tutorial:

Simulink: Bang-Bang Phase Detector
Simulink: Linear Phase Detector
Simulink: Linear PD, S-Curve
Simulink: Oscillator
Simulink: VCO
Simulink: PRBS-7 Data Generator
Simulink: CDR, BB-PD, Dual Path

Extra Materials:

Green-Sheet
Bang Bang Modeling by R.C. Walker
Analysis and modeling of bang-bang CDRs by Lee & Razavi
Arch. for Multi Gbit Wire-Linked CDR by Hsieh & Sobelman

EE-288: Data Conversion for AMS ICs

Course Note

ADC-Introduction Assignment 1 Solution
Assignment 2 Solution
Verilog-A
ADC-Sampler Assignment 1 Solution
ADC-Comparator Assignment 1 Solution
ADC-Flash Assignment 1 Solution
ADC-Pipeline Assignment Solution
ADC-Testing Assignment Solution
ADC-Oversampling Assignment Solution
TDC-1,TDC-2 Assignment Solution

Extra Materials:

Green-Sheet
Studies on CMOS DAC Converters By Jacob Wikne
MOSFET fT and fMax

Appointment

Contact Info

Dr. Shahab Ardalan

ENG 351

Electrical Engineering Department

San Jose State University

One Washington Sq.

San Jose, California, USA

95192-0084

Tel: 1-408-924-4075

Fax: 1-408-924-3925